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STORY ANGLES - Focus on technical innovations: The reporter consistently highlights cutting-edge advancements in hardware, AI, and semiconductor technologies.
- Indexed articles, last 90 days
- 9
- Latest publication
- Aug 3, 2026
- Outlet visibility, for Semiconductor Engineering
- Top 1M sites
- Earliest in this view
- Jul 3, 2026
Latest articles
Chip Bridges Neuromorphic And Deep-Network Computing (TU Dresden) (opens the original)
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Researchers from Technische Universität Dresden and University of Manchester published a technical paper titled “The SpiNNaker2 Chip: A Many-Core Platform for Flexible and Scalable Brain-Inspired Computing.” Abstract Excerpt: The paper presents SpiNNaker2 as a chip that “bridges the gap between deep networks and neuromorphic computing” and reports “ up to 4.5 TOPS in high performance... » read more The post <a href="https://semiengineering.com/chip-bridges-neuromorphic-and-deep-network-computing
Modular Verification of RTL Processors Against ISA Contracts (MIT, Google, UW) (opens the original)
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Researchers from MIT, Google, and University of Washington published a technical paper titled “Granite: A Modular Methodology for Foundational Verification of Hardware-Software Leakage Contracts.” Abstract Excerpt: “Granite is a methodology for modular verification of both functional correctness and nonleakage of RTL processors against ISA contracts. We prove that the cycle-by-cycle timing of a pipelined RISC... » read more The post <a href="https://semiengineering.com/modular-verificatio
Hybrid Memory Combines NAND Flash And DRAM For Faster Data Transfer (U. of Seoul) (opens the original)
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Researchers from University of Seoul published a technical paper titled “NAD Memory: A Hybrid Memory Device Combined with NAND Flash Memory and DRAM.” The paper proposes “a hybrid memory architecture, termed NAD, which tightly integrates DRAM and NAND flash to enable direct and parallel data transfer. By eliminating intermediate components such as I/O buffers and... » read more The post <a href="https://semiengineering.com/nad-memory-combines-nand-flash-and-dram-for-faster-data-transfer-
2D P-Type Semiconductors with Oxide N-Channel Transistors For Complementary BEOL CMOS (Stanford, Hanyang) (opens the original)
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Researchers from Stanford University and Hanyang University published a technical paper titled “Bridging the p-type gap in oxide electronics with 2D semiconductors.” “The review assesses manufacturing-aligned pathways to high-performance 2D p-channel transistors, covering transfer-free low-temperature growth, clean van der Waals contacts, gentle p-doping, and mitigation of crystallization, volatility, and interdiffusion,” and also “a pragmatic outlook... » rea
Deployable 3D Structures from Wafer-Fabricated Precursors (U. of Houston, Toyota, Imperial College London) (opens the original)
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Researchers from University of Houston, Toyota, and Imperial College London published a technical paper titled “Deployable 3D Architectures from Wafer-Fabricated Precursors.” The paper shows that “standard wafer fabrication can produce free-standing, mechanically stable, doubly-curved 3D structures with prescribed Gaussian curvature — a capability not previously achieved through semiconductor manufacturing” and points toward “realizable 3D semiconductor... » read more <p
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