Anton Shilov
- Indexed articles, last 90 days
- 105
- Latest publication
- Oct 1, 2026
- Outlet visibility, for Tom's Hardware
- Top 10K sites
- Earliest in this view
- Jul 7, 2026
Latest articles
Micron lawsuit claims Chinese memory maker YMTC poached its engineers, then sued it using its own stolen tech — ex-employees hid roles on LinkedIn, patented Micron tech, and won a German injunction (opens the original)
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Micron this month filed a lawsuit against China's 3D NAND champion YMTC, accusing it of poaching its leading engineers, illegally obtaining its NAND memory know-how from them, and then using that information to build its own non-volatile memory as well as its patent portfolio. The Boise, Idaho-based company further alleges that YMTC uses patents granted to its former employees to accuse Micron of patent infringements in various jurisdictions. To assemble a comprehensive IP portfolio that would c
Nuvacore reveals unconventional Core First CPU IP design strategy — chip startup led by Apple and Nuvia legends plans to delay ISA selection for as long as possible (opens the original)
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When Nuvacore, a new CPU startup founded by legendary CPU and system architects Gerard Williams, John Bruno, and Ram Srinivasan, emerged from stealth earlier this year, it promised to "rewrite the rules of silicon," but did not say how it planned to do so. On Thursday, the company finally broke its silence and revealed that it is taking an unusual development approach that allows it to design a significant portion of its CPU core IP before committing to a particular instruction set architecture
Silicon is starting to design silicon — how AI is being used in chipmaking, from EDA tools to OpenAI's Jalapeño and beyond (opens the original)
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In late August, Architect Labs claimed it had designed a chip that was almost entirely developed by AI, an industry-first achievement. AI is already used to optimize floorplans, placement and routing, verification, and other stages of semiconductor development. Generative AI can assist engineers with RTL code, whereas emerging agentic systems can operate electronic design automation (EDA) tools, analyze results, identify problems, modify designs, and repeat the process with increasingly less hum
Intel's next-gen Nova Lake platforms pass compliance at USB and PCIe standards bodies as launch looms — PCI-SIG and USB-IF give their stamp of approval (opens the original)
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The USB Implementers Forum now lists some of Intel's Core Ultra 400-series 'Nova Lake' platforms in its Integrators List, meaning that the products have passed applicable USB compliance and interoperability tests. The PCI-SIG Integrators List also includes Intel’s 900-series chipsets for Nova Lake-S processors. Such tests are conducted ahead of product launches to ensure interoperability and to gain the right to use the PCIe and USB logos on new products. The USB-IF listing confirms that Intel's
Intel expects 14A to be 'within 5%' the performance of TSMC's A14 — conservative forecast clashes with 18A's frequency lead and promised 20% gains (opens the original)
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Intel's 14A (1.4nm-class) process technology is expected to deliver performance 'within 5%' of TSMC's A14 (1.4nm-class) production node, Naga Chandrasekaran, the chief technology and operations officer as well as general manager of Intel Foundry, told investment banking firm KeyBanc (via @Alex_Intel_). Given TSMC's track record of delivering steady performance, power, and area (PPA) gains with every new node, this might sound like entirely good news. However, the statement deserves a closer exam
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